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description the bu-61588 mini-ace and bu-61688 mini-ace plus* integrates two 5-volt-only transceivers, protocol, memory management, processor interface logic, and 4k x 16, or 64k x 16* words of ram in a choice of pin grid array (pga), quad flat pack or gull lead packages. the mini-ace is pack- aged in a 1.0 square inch, low profile, cofired ceramic multi-chip-module (mcm) package making it the smallest integrated mil-std-1553 bc/rt/mt in the industry. the mini-ace provides full compatibil- ity to ddc?s bu-61580 and bu-65170 advanced communication engine (ace). as such, the mini-ace includes all the hardware and software archi- tectural features of the ace. the mini-ace contains internal address latches and bidirectional data buffers to provide a direct interface to a host processor bus. the memory management scheme for rt mode provides three data struc- tures for buffering data. these struc- tures, combined with the mini-ace?s extensive interrupt capability, serve to ensure data consistency while off- loading the host processor. the mini-ace plus* can optionally boot-up as a rt with the busy bit set for 1760 applications. the mini-ace bc mode implements several features aimed at providing an efficient real-time software interface to the host processor including automatic retries, programmable intermessage gap times, automatic frame repetition, and flexible interrupt generation. the advanced architectural features of the mini-ace, combined with its small size and high reliability, make it an ideal choice for demanding military and indus- trial processor-to-1553 applications. features 5 volt only fully integrated mil-std-1553 a/b stanag 3838 compliant terminals one-square-inch package smallest bc/rt/mt in the industry hardware and software compatible with bu-61580 ace series flexible processor/memory interface bootable rt* option 4k x 16 or 64k x 16* shared ram automatic bc retries programmable bc gap times programmable illegalization simultaneous rt/monitor mode operates from 10*/12 /16 / 20* mhz clock transceiver a ch. a transceiver b ch. b dual encoder/decoder, multiprotocol and memory management rt address 4k x 16 or 64k x 16 * shared ram address bus processor and memory interface logic data bus d15-d0 a15-a0 data buffers address buffers processor data bus processor address bus miscellaneous clk_in, mstclr,ssflag/ext_trg rtad4-rtad0, rtadp ioen, readyd addr_lat/memoe, zero_wait/memwr, 8/16-bit/dtreq, polarity_sel/dtack int transparent/buffered, strbd, select, rd/wr, mem/reg, trigger_sel/memena-in, msb/lsb/dtgrt processor and memory control interrupt request tx/rx_a tx/rx_a tx/rx_b tx/rx_b rt_ad_lat ? 1996, 1999 data device corporation figure 1. bu-65178 / 65179* /61588 /61688*/61689* block diagram bu-65178 /65179*/61588 /61688*/61689* miniature advanced communication engine (mini-ace) and mini-ace plus* refer to ace datasheet and ace user?s guide for additional info.
2 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 w w w w w w w w w w w w w w v v ma ma ma ma ma ma ma ma ma ma 1553 message timing completion of cpu write (bc start)- to-start of next message bc intermessage gap (note 8) bc/rt/mt response timeout (note 9) ! 18.5 nominal ! 22.5 nominal ! 50.5 nominal ! 128.0 nominal rt response time (note 11) transmitter watchdog timeout units max typ min parameter 0.475 0.905 1.160 1.670 0.200 0.630 0.885 1.395 0.5 1.00 1.43 1.86 2.72 1.0 1.50 1.93 2.36 3.22 0.25 0.68 1.11 1.97 power supply requirements voltages/tolerances ! bu-65178/61588x3 +5 v (logic) +5 v (ch. a, ch. b) current drain (total hybrid) ! bu-65178/65179 * /61588x0 +5 v (logic) ! bu-65178/61588x3 +5 v (logic, ch. a, ch. b) idle 25% transmitter duty cycle 50% transmitter duty cycle 100% transmitter duty cycle ! bu-61688 * /61689x0 * +5 v (logic) ! bu-61688 * /61689x3 * +5 v (logic, ch. a, ch. b) idle 25% transmitter duty cycle 50% transmitter duty cycle 100% transmitter duty cycle 5.0 5.0 95 245 360 590 power dissipation total hybrid ! bu-65178/65179 * /61588x0 +5 v (logic) ! bu-65178/61588x3/65179x3 idle 25% duty cycle 50% duty cycle 100% duty cycle ! bu-61688 * /61689x0 * +5 v (logic) ! bu-61688 * /61689x3 * idle 25% duty cycle 50% duty cycle 100% duty cycle hottest die ! bu-65178/61588x3/65179x3 */ bu-61688 * /61689x3 * idle 25% duty cycle 50% duty cycle 100% duty cycle * mini-ace plus with 64k words of ram. ram impact to power supply is based on host processor activity; subtract 140 ma if host is idle. v v logic vih vil iih (vcc = 5.5 v, vin = vcc) iih (vcc = 5.5 v, vin = 2.7 v) ! ssfla g /ext_trig ! all other inputs iil (vcc = 5.5 v, vin = 0.4 v) ! ssfla g /ext_trig ! all other inputs voh (vcc = 4.5 v, vih = 2.7 v, vil = 0.2 v, ioh = max) vol (vcc = 4.5 v, vih = 2.7 v, vil = 0.2 v, iol = max) iol ! db15-db0 a15-a0 memoe /addr_lat memwr /zer o w ait dtreq /16/8 dt a ck /polarity_sel ! int read yd ioen ioh ! db15-db0 a15-a0 memoe /addr_lat memwr /zer o w ait dtreq /16/8 dt a ck /polarity_sel ! int read yd ioen ci (input capacitance) cio ( bi-directional signal input capacitance) vp-p vp-p vp-p mvp-p, diff mv nsec 9 27 27 10 250 300 7 21 22 150 6 18 20 -250 100 kohm pf vp-p vpeak 5 0.860 10 2.5 0.20 0 v v v 6.0 7.0 vcc+0.3 -0.3 -0.3 -0.3 absolute maximum rating supply voltage ! logic +5 v ! transceiver +5 v (note 12) logic ! voltage input range table 1. b u-65178/65179*/61588/61688*/61689* specifications units max typ min parameter receiver differential input resistance (notes 1-7) differential input capacitance (notes 1-7) threshold voltage, transformer coupled, measured on stub common mode voltage (note 7) transmitter differential output voltage ! direct coupled across 35 ? ! transformer coupled across 70 ? : standard product = ? xx0 1760 amplitude compliant product = ? xx2 ( note 13 and ordering information ? test criteria) output noise, differential (direct coupled) output offset voltage, transformer coupled across 70 ohms rise/fall time table 1. b u-65178/65179*/61588/61688*/61689* specifications (cont?d)
3 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 clock input ! long term tolerance 1553a mode 1553b mode ! short term tolerance, 1 second 1553a mode 1553b mode ! duty cycle 16 mhz 12 mhz 10 mhz* 20 mhz oz (g) in. (mm) in. (mm) 0.6 (17) 1.0 x 1.0 x 0.150 (25.4 x 25.4 x 3.81) 1.0 x 1.0 x 0.155 (25.4 x 25.4 x 3.94) physical characteristics size ! bu-65178/61588 p bu-65179 * /61688 * /61689 * ! bu-65178/61588 f/g bu-65179 * /61688 * /61689 * weight ! bu-65178/61588 f/p/g bu-65179 * /61688 * /61689 * c/w c c c 0.01 0.1 0.001 0.01 67 60 60 60 6.8 150 150 +300 16.0 12.0 -55 -65 thermal thermal resistance, junction-to-case, hottest die ( ! bu-65178/61588x3 * operating junction temperature storage temperature lead temperature (soldering, 10 sec.) units max typ min parameter table 1. b u-65178/65179*/61588/61688*/61689* specifications (cont?d) notes: notes 1 through 6 are applicable to the receiver differential resistance and differential capacitance specifications: (1) specifications include both transmitter and receiver (tied together internally). (2) measurement of impedance is directly between pins tx/rx a(b) and tx /rx a(b) of the bu-65178/61588x3 hybrid. (3) assuming the connection of all power and ground inputs to the hybrid. (4) the specifications are applicable for both unpowered and powered conditions. (5) the specifications assume a 2 volt rms balanced, differential, sinu- soidal input. the applicable frequency range is 75 khz to 1 mhz. (6) minimum resistance and maximum capacitance parameters are guaranteed, but not tested, over the operating range. (7) assumes a common mode voltage within the frequency range of dc to 2 mhz, applied to pins of the isolation transformer on the stub side (either direct or transformer coupled), referenced to hybrid ground. use a ddc recom- mended transformer or other transformer that provides an equivalent cmrr. (8) typical value for minimum intermessage gap time. under software control, may be lengthened to (65,535 ? s status word. (12) external 10 ? 1760 requires that the mini-ace produce a 20 vp-p min- imum output on the stub connection. 33 40 40 40 frequency ! bu-61588/61688*/65178 default mode 16 mhz software programmable option 12 mhz ! bu-61689* default mode 20 mhz software programmable option 10 mhz ! bu-65179 * pin programmable option 10/12/16/20 mhz % % % % % % % % table 2. bu-65178 / 65179* /61588 /61688*/61689* pin listings (qfp-quad flat pack, pga-pin grid array and gull lead) 35 rtad4 ** qfp name qfp name 1 mem/reg 42 d00 2 mstclr 43 d02 3 a11 44 d03 4 a10 45 d05 5 tx/rx-a 46 d08 6 a08 47 7 d07 tx/rx-a 48 8 d13 a14, see note 1 49 d12 9 a04 50 d14 10 a03 51 d09 11 a07 52 d11 12 a02 53 d15 13 tx/rx-b 54 d10 14 memoe/addr_lat 55 transparent/ buffered 15 a00 56 readyd 16 tx/rx-b 57 int 17 logic gnd 58 ioen 18 logic gnd 59 tx_inh_a 19 logic gnd 60 tx_inh_b 20 +5v v cc2 61 select 21 rtad2 62 strbd 22 a06 63 rd/wr 23 memwr/ zerowait 64 dtgrt/msb/lsb 24 dtreq/16/8 65 test output (rx-a) 25 test output (rx-b) 66 a15, see note 1 26 test output (rx-b) 67 test output (rx-a) 27 a01 68 a05 28 memena_in/ trigger_sel 69 a09 29 dtack/ polarity_sel 70 a12, see note 2 30 clock_in 71 a13, see note 3 31 rt_ad_lat 72 +5v v cc1 32 ssflag/ext_trig ** test output (a_rext) 33 rtad0 ** test output (a_test1) 34 rtad3 ** test output (ab_test4) test output (b_rext) 36 d06 ** test output (ab_tstck) h8 pga b4 b5 c2 c3 c1 d2 d1 c4 e3 f2 e1 f3 g1 g4 g3 h1 a7 a8 j8 a9 j7 f1 j2 h5 h3 h4 g2 j5 j6 h6 g7 h2 h7 g8 e8 e4 pga h9 f9 f7 g5 e7 e9 d7 b2 d9 b9 a2 d8 a1 c9 b8 c8 a3 b7 c7 c6 a6 a5 j1 a4 c5 b6 e2 j4 b3 b1 j3 d4 d5 d6 e6 37 d3 +5v v cc ** f4 test output (ab_test2) 38 f8 d01 ** f5 test output (ab_test3) 39 g6 d04 ** f6 test output (b_test1) 40 g9 rtadp n/a e5 no connect 41 j9 rtad1 notes ** note that the test output pins on the flat pack are pads located on the bottom of the package. 1. bu-65179 * , a15/a14 pins are actually clk sel 1 / clk sel 0 respectively. 2. bu-65179 * , a12 pin selects the rt_boot_l optional mode. 3. bu-65179 * , a13 pin has no connection.
4 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 1.000 sq
5 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 9 8 7 6 5 4 3 2 1 0.800 0.005 (20.320 0.127) 0.100 0.005 (2.540 0.127) top view notes: 1) dimensions are in inches (mm). 2) package material: alumina (al 2 o 3 ) 3) lead material: kovar, plated by 50
6 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 transformers in selecting isolation transformers to be used with the mini-ace, there is a limitation on the maximum amount of leakage induc- tance. if this limit is exceeded, the transmitter rise and fall times may increase, possibly causing the bus amplitude to fall below the minimum level required by mil-std-1553. in addition, an excessive leakage imbalance may result in a transformer dynam- ic offset that exceeds 1553 specifications. the maximum allowable leakage inductance is 6.0 h, and is measured as follows: the side of the transformer that connects to the mini-ace is defined as the ? primary ? winding. if one side of the primary is shorted to the primary center-tap, the inductance should be measured across the ? secondary ? (stub side) winding. this inductance must be less than 6.0 h. similarly, if the other side of the primary is shorted to the primary center-tap, the inductance measured across the ? secondary ? (stub side) wind- ing must also be less than 6.0 h. the difference between these two measurements is the ? differential ? leakage inductance. this value must be less than 1.0 h. beta transformer technology corporation (bttc), a subsidiary of ddc, manufactures transformers in a variety of mechanical configurations with the required turns ratios of 1:2.5 direct cou- pled, and 1:1.79 transformer coupled. table 3 provides a listing of many of these transformers. for further information, contact bttc at 631-244-7393 or at www.bttc-beta.com. dlp-7014 slp-8007 slp-8024 not recommended lpb-5015 b-3310 hlp-6015 dual epoxy transformer, side by side, surface mount, 0.930" x 0.630", 0.155" max height dlp-7115 (see note1) dual epoxy transformer, side by side, surface mount, 1.410" x 0.750", 0.130" max height single metal transformer, hermetically sealed, surface mount, 0.630" x 0.630", 0.175" max height b-3261 hlp-6014 dual epoxy transformer, side by side, flat pack, 0.930" x 0.630", 0.155" max height single metal transformer, hermetically sealed, flat pack, 0.630" x 0.630", 0.175" max height b-3300 dual epoxy transformer, side by side, through-hole, 0.930" x 0.630", 0.155" max height tst-9027 dual epoxy transformer, twin stacked, flat pack, 0.625" x 0.625", 0.280" max height tst-9017 dual epoxy transformer, twin stacked, surface mount, 0.625" x 0.625", 0.280" max height tst-9007 dual epoxy transformer, twin stacked, 0.625" x 0.625", 0.280" max height b-3819 lpb-5014 single epoxy transformer, surface mount, hi-temp solder, 0.625" x 0.625", 0.220" max height. single epoxy transformer, flat pack, 0.625" x 0.625", 0.150" max height b-3227 single epoxy transformer, surface mount, 0.625" x 0.625", 0.275" max height b-3231 single epoxy transformer, flat pack, 0.625" x 0.625", 0.275" max height b-3818 b-3067 b-3226 single epoxy transformer, through-hole, 0.625" x 0.625", 0.220" max height. single epoxy transformer, through-hole, 0.625" x 0.625", 0.250" max height bttc part no. transformer configuration single epoxy transformer, surface mount, 0.625" x 0.625", 0.150" max height b-3229 single epoxy transformer, through hole, transformer coupled only, 0.500" x 0.350", 0.250" max height table 3. bttc transformers for use with mini-ace notes: 1. dlp-7115 operates to +105 c max. all other transformers listed operate to +130 c max.
7 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 interface to mil-std-1553 bus figure 5 illustrates the interface between the various versions of the mini-ace and a mil-std-1553 bus. connections for both direct (short stub) and transformer (long stub) coupling, as well as the nominal peak-to-peak voltage levels at various points (when transmitting), are indicated in the diagram. mini-ace data bus z 0 55 ? ?
8 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 ordering information bu-61588 f3-11xx supplemental process requirements: s = pre-cap source inspection l = pull test q = pull test and pre-cap inspection k = one lot date code w = one lot date code and precap source y = one lot date code and 100% pull test z = one lot date code, precap source and 100% pull test blank = none of the above test criteria: 0 = standard testing 2 = mil-std-1760 amplitude compliant - applies to +5 volt transceiver option only process requirements: 0 = standard ddc practices, no burn-in (see table below.) 1 = mil-prf-38534 compliant 2 = b* 3 = mil-prf-38534 compliant with pind testing 4 = mil-prf-38534 compliant with solder dip 5 = mil-prf-38534 compliant with pind testing and solder dip 6 = b* with pind testing 7 = b* with solder dip 8 = b* with pind testing and solder dip 9 = standard ddc processing with solder dip, no burn-in (see table below.) temperature range/data requirements: 1 = -55 c to +125 c 2 = -40 c to +85 c 3 = 0 c to +70 c 4 = -55 c to +125 c with variables test data 5 = -40 c to +85 c with variables test data 8 = 0 c to +70 c with variables test data voltage/transceiver option: 0 = no transceivers 3 = +5 volts, rise/fall times=100 to 300 ns (-1553b) (see test criteria - 1760 compliant with option -xx2) package type: f = 72-pin quad flat pack p = 81-pin pga g = 72-pin gull lead (contact factory.) product type: 65178 = rt only, 16/12 mhz, 4k ram 61588 = bc/rt/mt, 16/12 mhz, 4k ram 65179 = rt/rt_boot, 10/12/16/20 mhz, 4k ram 61688 = bc/rt/mt, 12/16 mhz, 64k ram 61689 = bc/rt/mt, 10/20 mhz, 64k ram *standard ddc processing with burn-in and full temperature test, see table below. ? 1015, table 1 burn-in a 2001 constant acceleration c 1010 temperature cycle a and c 1014 seal ? 2009, 2010, 2017, and 2032 inspection condition(s) method(s) mil-std-883 test standard ddc processing
9 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 notes:
10 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 notes:
11 data device corporation www.ddc-web.com bu-65178/65179*/61688*/61689* f1 web-09/02-0 notes:
12 f1 web-09/02-0 printed in u.s.a. data device corporation registered to iso 9001 file no. a5976 r e g i s t e r e d f i r m ? u 105 wilbur place, bohemia, new york, u.s.a. 11716-2482 for technical support - 1-800-ddc-5757 ext. 7234 headquarters, n.y., u.s.a. - tel: (631) 567-5600, fax: (631) 567-7358 southeast, u.s.a. - tel: (703) 450-7900, fax: (703) 450-6610 west coast, u.s.a. - tel: (714) 895-9777, fax: (714) 895-4988 united kingdom - tel: +44-(0)1635-811140, fax: +44-(0)1635-32264 ireland - tel: +353-21-341065, fax: +353-21-341568 france - tel: +33-(0)1-41-16-3424, fax: +33-(0)1-41-16-3425 germany - tel: +49-(0)8141-349-087, fax: +49-(0)8141-349-089 japan - tel: +81-(0)3-3814-7688, fax: +81-(0)3-3814-7689 world wide web - http://www.ddc-web.com the information in this data sheet is believed to be accurate; however, no responsibility is assumed by data device corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. specifications are subject to change without notice.

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